Register map(s) for this device, with a note of how far each has been checked. Addresses are 0-based, as on the wire. Scale and byte order are confirmed only at the hardware-verified rung.
Decode path is structurally sound (addresses, widths, finite values). Does NOT prove word order or scaling.
| point | address (0-based) | type | scale | unit |
|---|---|---|---|---|
| PCD1 Control Word (Coils 1-16) | 0 | U16 | 1 | |
| Array index | 8 | U16 | 1 | |
| PCD2 Reference Value (Coils 17-32) | 16 | U16 | 1 | |
| PCD1 Status Word (Coils 33-48) | 32 | U16 | 1 | |
| PCD2 Given output frequency (Coils 49-64) | 48 | U16 | 1 | |
| Write parameters to eeprom | 64 | U16 | 1 | |
| Address (VLT 2800) / Protocol (VLT 6000/8000) | 4999 | U16 | 1 | |
| Baudrate (VLT 2800) / Address (VLT 6000/8000) | 5009 | U16 | 1 | |
| Protocol (VLT 2800) | 5609 | U16 | 1 | |
| Modbus parity and message framing | 5699 | U16 | 1 | |
| Modbus communications timeout | 5709 | U16 | 1 | ms |
Each rung states what it proved and what it did not. Gray until proven; green is earned by hardware only.
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