Fuji FRENIC-Ace drive

Register map(s) for this device, each at the trust rung it earned. Addresses are 0-based as on the wire; word order and scaling are only confirmed at the hardware-verified rung.

interop-verified

Read + decoded cleanly over a real network vs an independent third-party Modbus test server (transport and framing; reads are remapped into the server's register window, so the map's own addresses are NOT exercised). Does NOT prove word order/scaling against the actual device.

point	address (0-based)	type	scale	unit
frequency_reference	1797	U16	0.01	Hz
operation_command	1798	U16	1

link settings as documented (unverified): RTU/TCP; default 19200 8N2; unit ID 1; FC 01,03,05,06,08,15,16; Modbus RTU is supported as standard via RS485. Modbus over Ethernet is supported via OPC-PRT option card.

bench facts as documented (unverified)

terminals	DX+/DX- (port 2)
connector	RJ45 (port 1)
wiring notes	Wiring to DX+/DX- terminals is recommended as the RJ45 jack is typically reserved for keypad use.
max registers/read	100
protocol notes	Read Coil Status is limited to 80 coils maximum. Read Holding Registers is limited to 100 registers maximum. Force Multiple Coils is limited to 16 coils maximum. Preset Multiple Registers is limited to 100 registers maximum.
identification notes	Modbus registers are organized by drive function code group. The hi-byte of the register address is determined by its function code group; the low byte is determined by the drive function code number.
doc revision	None

generated by gemini:gemini-3.5-flash · harvested from https://americas.fujielectric.com/wp-content/uploads/2021/03/FRENIC-Ace-Modbus-Communications-FECA-AN-183.pdf (Fuji Electric); manual-faithful — the document's claims, panel risk: LOW — panel concurs, no field disagreements; proved interop-verified on 2026-06-10 · recorded 2026-06-10

The trust ladder

Each rung states what it proved and what it did not. Gray until proven; green is earned by hardware only.

generated — A prompt produced it. Unproven — anyone can regenerate this.
structure-verified — Decode path is structurally sound (addresses, widths, finite values). Does NOT prove word order or scaling.
interop-verified — Read + decoded cleanly over a real network vs an independent third-party Modbus test server (transport and framing; reads are remapped into the server's register window, so the map's own addresses are NOT exercised). Does NOT prove word order/scaling against the actual device.
simulator-verified — Decoded correctly against a protocol emulator seeded with known-true values — catches word-order/scaling errors vs the emulator, not the physical device.
hardware-verified x1 — Matched a real device with operator-attested readings as ground truth — the only rung that confirms word order + scaling on the wire.

Have a device that isn't here? Upload its register map — generation is free, and the connector earns its rung by being proven, not claimed.

Need it proven on your own device? Hardware verification — if it doesn't verify, you don't pay.

Building a platform? License the verified library — machine-readable maps, firmware matrix, API access.